High-Level Synthesis & HDL Autocoding
BERTEN Software Acceleration solution takes advantage of the FPGA processing power for running your high-computational load software. The C, C++, SystemC or Matlab/Simulink source code is adapted for direct High-Level Synthesis (HLS) or HDL coding, targeting into Xilinx programmable devices. The optimised module is executed into an FPGA/SoC board, interfacing locally (PCIe, USB, I2C, SPI, GPIO, etc.) or remotely via Gigabit Ethernet.
A complete hardware solution is offered implementing HLS into BERTEN’s GigaExpress Board, which includes a Zynq® 7012S/7015/7030 with PCIe and Ethernet interfaces, allowing a direct integration of the software acceleration in your system.